Embedded NVIDIA Jetson TX2 NX Module IPC Computer For Industrial Robots

The NVIDIA Jetson TX2 series module can be used in a wide variety of applications requiring varying performance metrics. To accommodate these varying conditions, frequencies and voltages are actively managed by Tegra Power and Thermal Management Software and influenced by workload.

ARM Cortex-A57 MPCore (Quad-Core) Processor
All four cores in the ARM Cortex-A57 are identical implementations of the ARMv8 architecture. Each core includes 48KB Instruction (I-cache) and 32KB Data (D-cache) Level 1 caches. A 2MB L2 cache is shared by all cores. Cortex-A57 processor features include:

Full implementation of the ARM v8 architecture

Superscalar,variable-length,out-of-orderpipeline

Dynamic branch prediction with Branch Target Buffer(BTB) and Global History Buffer RAMs,are turn stack,andan indirect predictor

48-entry fully-associative L1 instruction TLB with native support for 4KB,64KB,and 1MB pagesizes.

32-entry fully-associative L1 data TLB with native support for 4KB, 64KB and 1MB pages sizes.

4-wayset-associative unified 1024-entry Level 2(L2) TLB in each processor

Fixed 48KB parity protected L1 instruction cache and 32KB ECC protected L1data cache

A 2MB ECC protected L2 cache shared by all the Cortex-A57 cores

Embedde Trace Microcell (ETM) based on the ETM v4 architecture

Performance Monitor Unit(PMU) based on the PMU v3 architecture

Cross Trigger Interface (CTI) for multiprocessor debugging

Cryp to graphic Engine for cryp to function support

Interface to an external Generic Interrupt Controller(vGIC-400)

Support for power management with multiple power domains

Cortex-A57 Revisionr 1p3