| Sign In | Join Free | My benadorassociates.com | 
              
  | 
      
| Categories | Programmable IC Chip | 
|---|---|
| Brand Name: | XILINX / AMD | 
| Model Number: | XCR3064XL-10VQG44I | 
| Place of Origin: | original | 
| MOQ: | 1 | 
| Price: | Negotiable | 
| Payment Terms: | L/C, D/A, D/P, T/T, Western Union, MoneyGram | 
| Supply Ability: | 999999 | 
| Delivery Time: | 1-3 days | 
| Packaging Details: | standard | 
| Delay Time tpd(1) Max: | 9.1 ns | 
| Voltage Supply - Internal: | 2.7V ~ 3.6V | 
| Number of Logic Elements/Blocks: | 4 | 
| Number of Macrocells: | 64 | 
| Number of Gates: | 1500 | 
| Operating Temperature: | -40°C ~ 85°C (TA) | 
| PN: | XCR3064XL-10VQG44I | 
XCR3064XL-10VQG44I Programmable IC Chip 3.3V 64 Macrocell CPLD Package 44VQFP system frequency of 192 MHz
Delay Time tpd(1) Max  | 9.1 ns  | |
Voltage Supply - Internal  | 2.7V ~ 3.6V  | |
Number of Logic Elements/Blocks  | 4  | |
Number of Macrocells  | 64  | |
Number of Gates  | 1500  | |
Number of I/O  | 36  | |
Operating Temperature  | -40°C ~ 85°C (TA)  | |
Mounting Type  | Surface Mount  | |
Package / Case  | 44-TQFP  | |
Supplier Device Package  | 44-VQFP (10x10)  | 
XCR3064XL-10VQG44I Features:
• Low power 3.3V 64 macrocell CPLD
• 5.5 ns pin-to-pin logic delays
• System frequencies up to 192 MHz
• 64 macrocells with 1,500 usable gates
• Available in small footprint packages
- 44-pin VQFP (36 user I/O pins)
- 48-ball CS BGA (40 user I/O pins)
- 56-ball CP BGA (48 user I/O pins)
- 100-pin VQFP (68 user I/O pins)
• Optimized for 3.3V systems
- Ultra-low power operation
- Typical Standby Current of 17 μA at 25°C
- 5V tolerant I/O pins with 3.3V core supply
- Advanced 0.35 micron five layer metal EEPROM process
- Fast Zero Power CMOS design technology
- 3.3V PCI electrical specification compatible outputs (no internal
clamp diode on any input or I/O, no minimum clock input
capacitance)
• Advanced system features
- In-system programming
- Input registers
- Predictable timing model
- Up to 23 available clocks per function block
- Excellent pin retention during design changes
- Full IEEE Standard 1149.1 boundary-scan (JTAG)
- Four global clocks
- Eight product term control terms per function block
• Fast ISP programming times
• Port Enable pin for dual function of JTAG ISP pins
• 2.7V to 3.6V supply voltage at industrial temperature range
• Programmable slew rate control per macrocell
Description:
The CoolRunner™ XPLA3 XCR3064XL device is a 3.3V, 64-macrocell CPLD
targeted at power sensitive designs
that require leading edge programmable logic solutions. A total of
four function blocks provide 1,500 usable gates. Pin-to-pin
propagation delays are as fast as 5.5 ns with a maximum system
frequency of 192 MHz.

                                 
                             |