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Sub-Degree Phase Matching MOS Capacitor 100 pF 30V Chip for Beamforming Phased Array Modules

Categories MOS Capacitors
Customization: Custom capacitance 10 pF-1000 pF, gradient matching layer and die geometry
RoHS: Compliant (EU 2015/863)
Moisture Sensitivity Level: MSL 1 (J-STD-020)
Usable Bandwidth: DC to 18 GHz (typical)
Operating Temperature: -55°C to +125°C
Model Number: HPM101S30V100
Delivery Time: 5-7 working days for stock, 3-4 weeks for production
Place of Origin: Shaanxi, China
Phase Matching Tolerance: Sub-degree, element-to-element
Payment Terms: L/C,D/A,D/P,T/T
Brand Name: Hoan
Certification: ISO 9001:2015, RoHS
MOQ: 10 Pieces
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Sub-Degree Phase Matching MOS Capacitor 100 pF 30V Chip for Beamforming Phased Array Modules

HPM101S30V100 Sub-Degree Phase Matching MOS Capacitor — 100 pF 30V for Beamforming


In short: The HPM101S30V100 is a 100 pF, 30 V single-layer MOS capacitor built on high-resistivity float-zone silicon with a thermally grown SiO2 dielectric. It is specified for sub-degree phase matching across an array, so that individual elements keep a consistent phase response in beamforming front-ends. A gradient impedance matching layer blends the transition between the electrode interface and the surrounding transmission line, which keeps that phase consistency over a wide band. Custom capacitance values and matching layers are available.


Key Facts


ItemValue
BrandHoan
ModelHPM101S30V100
CategoryMOS Capacitors
Capacitance100 pF ±5% (±2% on request)
Rated DC Voltage30 V
DielectricThermal SiO2, paraelectric (300 nm)
Phase MatchingSub-degree, element-to-element
Impedance InterfaceGradient impedance matching layer
Usable BandwidthDC to 18 GHz (typical)
TerminationWire bond or flip-chip micro-bump
Chip Size0.50 x 0.50 x 0.15 mm
Operating Temperature-55 °C to +125 °C
Place of OriginShaanxi, China
CertificationISO 9001:2015, RoHS
MOQ10 pieces
Lead Time5-7 working days for stock, 3-4 weeks for production


Gradient Impedance Matching Layer


An abrupt change in electrode or interface impedance reflects part of the signal and adds a frequency-dependent phase tilt. The HPM101S30V100 uses a gradient impedance matching layer, a stepped transition fabricated between the dielectric interface and the electrode, that spreads that change across several intermediate impedance levels instead of one step. The result is a smoother impedance path with lower reflection and a flatter phase response across the working band.

  • Stepped impedance transition instead of a single abrupt step
  • Lower reflection and flatter phase across the band
  • Compatible with wire-bond and flip-chip (micro-bump) assembly


Applications


  • Phased-array and beamforming front-end modules
  • Digital beamforming receive and transmit channels
  • 5G and 6G antenna array tiles
  • Satellite communication phased arrays
  • Wideband RF coupling and DC blocking between channels
  • Test and measurement front-ends needing matched phase between ports


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